[73] Point-Of-Load Converter Design – Part II Input Filter Interactions

Point-of-load converters are prone to unusual results when considering the input filter design with low value capacitors.

Introduction

Point-of-load converters commonly use multilayer ceramic capacitors instead of electrolytic capacitors. The effect of this change is strongly felt in the bulk storage capacitor value, and can lead to unexpected variations in control measurements. Instability can result if input filter capacitors become too small.

 

Input Filter Closed-Loop Impedance Interactions

Figure 1 shows the schematic of a boost converter with a synchronous rectifier. It has multilayer ceramic capacitors on both the input and output of the converter. Since this is a boost converter, the capacitor on the output sees a pulsating current, and hence must be relatively large to keep the output ripple low. On the input side, the current ripple is small, and the input capacitor is typically chosen to be a smaller value.

fig 1

Figure 1: 200 kHz Boost Converter with Synchronous Rectifier and MLC Input and Output Capacitors

The input capacitance is important for a second reason. In addition to attenuating the switching ripple, it provides stability to the power system. If the impedance of the source providing the input voltage to a power supply becomes too large, the system can go unstable. The source impedance is formed by a combination of the upstream power supply output impedance, cabling impedance, and input bypass capacitors. Too low a value of capacitance will raise the impedance.

Figure 2 shows the output impedance of the power source using a capacitance of 88 µF directly across the input of the boost power supply. The ideal closed-loop input impedance of the boost converter is plotted on the same graph. A switching regulator with infinite bandwidth looks like a negative resistance, and Middlebrook’s famous work [1] on this topic pointed out that the output impedance of the input power source (or filter) must be lower than the closed-loop input impedance of the power supply if the system is to remain stable. It can be seen that this is true for the curves of Figure 2.

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